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Let v = V > VT and v = 0 Assume that the input voltage, vin , is in the range 0 vin V To determine the state of the transmission gate, we shall consider only the extreme cases vin = 0 and vin = V When vin = 0, vGS1 = v vin = V 0 = V > VT Since V is above the threshold voltage, MOSFET Q1 conducts (in the ohmic region) Further, vGS2 = v vin = 0 > VT Since the gate-source voltage is not more negative than the threshold voltage, Q2 is in cutoff and does not conduct Since one of the two possible paths between vin and vout is conducting, the transmission gate is on Now consider the other extreme, where vin = V By reversing the previous argument, we can see that Q1 is now off, since vGS1 = 0 < VT However, now Q2 is in the ohmic state, because vGS2 = v vin = 0 V < VT In this case, then, it is Q2 that provides a conducting path between the input and the output of the transmission gate, and the transmission gate is also on We have therefore concluded that when v = V and v = 0, the transmission gate conducts and provides a near-zero-resistance (typically tens of ohms) connection between the input and the output of the transmission gate, for values of the input ranging from 0 to V

Let us now reverse the control voltages and set v = 0 and v = V > VT It is very straightforward to show that in this case, regardless of the value of vin , both Q1 and Q2 are always off; therefore, the transmission gate is essentially an open circuit The analog transmission gate nds common application in analog multiplexers and sample-and-hold circuits, to be discussed in 15

as well. For a more detailed list, check out http://msdn.microsoft.com/vstudio/support/readme/ default.aspx.

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911 Determine the appropriate value of RS if we wish to move the operating point of the MOSFET of Example 910 to vDSQ = 12 V Also nd the values of vGSQ and iDQ Are these values unique 912 Show that the CMOS bidirectional gate described in the Focus on Measurements: MOSFET Bidirectional Analog Gate box is off for all values of vin between 0 and V whenever v = 0 and v = V > VT 913 Find the lowest value of RD for the MOSFET of Example 99 that will place the MOSFET in the ohmic region

To complete this brief discussion of eld-effect transistors, we summarize the characteristics of depletion-mode MOSFETs and of JFETs While the construction details of these two families of devices differ, their operation is actually quite similar, and we shall develop one set of equations describing the operation of both Depletion MOSFETs The construction of a depletion-mode MOSFET and its circuit symbol are shown schematically in Figure 936 We note that the only difference with respect to the enhancement type devices is the addition of a lightly dopes n-type region between the oxide layer and the p-type substrate The presence of this n region results in the presence of conducting channel in the absence of an externally applied electric eld, as shown in Figure 937(a) Thus, depletion MOSFETs are normally on or normally conducting devices Since a channel already exists for vGS = 0, increasing the gate-source voltage will further enhance conductivity by drawing additional electrons to the channel, to reduce channel resistance If, on the other hand, vGS is made negative, the channel will be depleted of charge carriers, and channel resistance will decrease When vGS is suf ciently negative (less than a threshold voltage, Vt ), the channel electrons are all repelled into the substrate, and the channel ceases to conduct This corresponds to the cutoff region, depicted in Figure 937(b) It is important to note that the threshold voltage is negative in a depletion-mode device If we now repeat the qualitative analysis illustrated in Figure 930 for an enhancement-mode device for a depletion-mode MOSFET, we see that for a given drain-source voltage,

9

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p Bulk (substrate)

When the gate voltage is below the threshold voltage, the n-type channel has been depleted of charge carriers, and the MOSFET is in the cutoff region

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